; 64tass Turbo Assembler Macro V1.55.2200 listing file ; 64tass -Wall -Wmacro-prefix -Wshadow --verbose-list -o barebones.hex -L barebones.lst --intel-hex --m65816 barebones.asm ; Sun Feb 28 22:43:34 2021 ;Offset ;Hex ;Monitor ;Source ;****** Processing input file: barebones.asm ; Copyright 2021 Piotr Meyer ; ; Permission to use, copy, modify, and/or distribute this ; software for any purpose with or without fee is hereby ; granted, provided that the above copyright notice and ; this permission notice appear in all copies. ; THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ; ALL WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL ; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO ; EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, ; INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ; WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, ; WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER ; TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE ; USE OR PERFORMANCE OF THIS SOFTWARE. .cpu "65816" .include "macros_inc.asm" ;****** Processing file: macros_inc.asm ; Set 8-bit accumulator setaxs .macro .endm ; Set 16-bit accumulator setaxl .macro .endm ; Set 8-bit accumulator setas .macro .endm ; Set 16-bit accumulator setal .macro .endm ; Set 8 bit index registers setxs .macro .endm ; Set 16-bit index registers setxl .macro .endm sdb .macro ; Set the B (Data bank) register .endm ;****** Return to file: barebones.asm ;---------------------------------------------------------- ; # Description ; ; RETRO/816 - a port of RETRO Forth to C256 Foenix ; RETRO Forth was created by Charles Childers (crc) ; see: http://retroforth.org/ ; ; Program is created for C256 Foenix computer but should be ; able to run on almost any compatible system. ; ; At this moment we provide single NGA machine with fixed ; addresses at ZP and in main memory, but there is a room ; for multiple, independent VMs ; ## porting ; ; Current version is designed to be run on C256 Foenix ; computer with Foenix Kernel loaded ; We need two functions to be supported: ; C256_GETCHW - "wait for char and return it in A" ; C256_PUTC - "print char from A to screen" ; ; ## memory layout in C256 ; ; $0040 - begin of shared regions, used by various routines ; $00E0 - end of shared regions ; $00F0 - 16 bytes of 'temporary user variables; ; ; $2000 - begin of free space (test code in Foenix) ; $7FFF - end of free space ; $8000 - begin of CPU stack ; $FEFF - end of CPU stack ; ; XXX - move it to ZP ; $01:0000 - beginning NGA (memory), single segment (64k) ; 0000 - begin of data stack ; 03ff - end of data stack ; 0400 - beign of return ; 07ff - end of return stack ; .... - unused ; $02:0000 - start of main NGA memory ; $05:FFFF - end of main NGA memory ; ; $3a:0000 - beginning of NGA code (overwrites BASIC) ; .. ; ; ## implementation-specific notes ; ; There are few shortcuts and many inefficiences in code, ; it should be corrected or extend in future releases ; ; At this moment main pointers are somewhat inconsistent ; - IP counts CELLS when SP i RP count BYTES. It simplify ; code a lot ; ; IP - 16bit instruction pointer, thats means that ; system is able to use only FFFF cells ; unit: CELLS ; ; IPPTR - 24bit in-memory pointer, allows to use ; 4*FFFF memory. It should be equal to IP << 2 ; unit: BYTES ; ; SP - 16bit, stack pointer ; unit: BYTES (inc/dec by 4 bytes) ; ; RP - 16bit, return addres stack pointer, ; unit: BYTES (inc/dec by 4 bytes) ; ; ## booting ; ; C256 boot process, as remainder: ; ; 1. after boot CPU PC gets addr from $FFFC, ; 2. that value points to $FF00 and following code ; CLC ; XCE ; JML $1000 - BOOT vector of Foenix Kernel ; 3. JML IBOOT - internal boot routine ; 4. ... and, finally JML $03:A0000 to init BASIC ;---------------------------------------------------------- ; # constants ; ; note - unlike in 65c816 stacks in original NGA grows up, =$0400 STACK_DEPTH = $0400 ; bytes: depth of data stack =$0400 ADDRESSES = $0400 ; bytes: depth of address stack =$020000 IMAGE_ADDR = $02_0000 ; bytes: base address in real memory =$ffff CELL_MAX = $FFFF ; max allowed cell, IP is word-sized =4 IMAGE_BANKS = 4 ; by 64k, max with word-sized IP =4 CELL_SIZE = 4 ; bytes: single CELL size ; some sanitization checks .cerror IMAGE_ADDR & $00FFFF != $0000, "IMAGE_ADDR should be bank-aligned!" ; TOS*, NOS*, TRS* and MEM* variant are accessed by indexed ; modes (,X and ,Y). Different base addresses (+0, +2) are ; used to access low and high words without extra inx/iny =$0000 DSTACK = $0000 ; data stack addr, grows up =$0000 NOSl = DSTACK ; second item (,X) =2 NOSh = DSTACK + 2 ; second item (,X) =4 TOSl = DSTACK + 4 ; current item, low word =6 TOSh = DSTACK + 6 ; current item, high word =$0400 RSTACK = $0400 ; return stack addr, grows up =$0400 TRSl = RSTACK ; current stack item, low word =1026 TRSh = RSTACK + 2 ; current stack item. high word ; XXX - only used for stacks, rip it off =$01 MEM_SEGMENT = $01 ; memory bank segment: $01:xxxx ; nymber of devices supported by system =2 NUM_DEVICES = 2 ; ## debug variables (only for go65c816 emulator) =$10 TRACE_ON = $10 =$11 TRACE_OFF = $11 =$20 KILL = $20 ; ## FMX kernel vectors =$104c C256_GETCHW = $104c ; get character (wait) =$1018 C256_PUTC = $1018 ; put character ; --------------------------------------------------------- ; # local variables ; * = $60 >0060 00 00 IP .word 0 ; instruction pointer - cells >0062 00 00 00 00 IPPTR .dword 0 ; instruction pointer - bytes >0066 00 00 SP .word 0 ; data stack pointer - bytes >0068 00 00 RP .word 0 ; return stack pointer - bytes >006a 00 00 00 00 CMD .dword 0 ; temporary for OP unboundling >006e 00 00 00 00 TMP .dword 0 ; temporary =$6e TMPa = TMP ; additional identifiers >0072 00 00 00 00 TMPb .dword 0 ; for various cases >0076 00 00 TMPc .word 0 ; at this moment inst_di >0078 00 00 TMPd .word 0 ; ... ; --------------------------------------------------------- ; # main routine ; * = $03A0000 .3a0000 main .3a0000 18 clc clc .3a0001 fb xce xce .3a0002 main0 .3a0002 c2 30 rep #$30 REP #$30 ; set A&X long .al .xl .3a0004 48 pha pha ; begin setdbr macro .3a0005 08 php php .3a0006 e2 20 sep #$20 SEP #$20 ; set A short .as .3a0008 a9 3a lda #$3a lda #`msg_banner .3a000a 48 pha pha .3a000b ab plb plb .databank `msg_banner .3a000c 28 plp plp .3a000d 68 pla pla ; end setdbr macro .3a000e a2 dc 06 ldx #$06dc ldx #<>msg_banner .3a0011 20 7d 01 jsr $3a017d jsr prints .3a0014 20 32 00 jsr $3a0032 jsr prepare_vm .3a0017 20 be 00 jsr $3a00be jsr execute .3a001a 48 pha pha ; begin setdbr macro .3a001b 08 php php .3a001c e2 20 sep #$20 SEP #$20 ; set A short .as .3a001e a9 3a lda #$3a lda #`msg_end .3a0020 48 pha pha .3a0021 ab plb plb .databank `msg_end .3a0022 28 plp plp .3a0023 68 pla pla ; end setdbr macro .3a0024 a2 39 07 ldx #$0739 ldx #<>msg_end .3a0027 20 7d 01 jsr $3a017d jsr prints .3a002a 22 4c 10 00 jsl $00104c jsl C256_GETCHW .3a002e 5c 00 10 00 jmp $001000 jml $1000 ; BOOT ; ## preparing environment ; ; 1. clear memory region ; 2. clear stacks ; 3. copy image to memory region ; .3a0032 prepare_vm ; 1. clear memory .3a0032 48 pha pha ; begin setdbr macro .3a0033 08 php php .3a0034 e2 20 sep #$20 SEP #$20 ; set A short .as .3a0036 a9 3a lda #$3a lda #`msg_mclean .3a0038 48 pha pha .3a0039 ab plb plb .databank `msg_mclean .3a003a 28 plp plp .3a003b 68 pla pla ; end setdbr macro .3a003c a2 00 07 ldx #$0700 ldx #<>msg_mclean .3a003f 20 7d 01 jsr $3a017d jsr prints .3a0042 e2 20 sep #$20 SEP #$20 ; set A short .as .3a0044 c2 10 rep #$10 REP #$10 ; set X long .xl .3a0046 a9 02 lda #$02 lda #`IMAGE_ADDR .3a0048 85 6e sta $6e sta TMP .3a004a a0 04 00 ldy #$0004 ldy #IMAGE_BANKS .3a004d a5 6e lda $6e mclean0 lda TMP .3a004f 48 pha pha .3a0050 ab plb plb .3a0051 a2 00 00 ldx #$0000 ldx #$0000 .3a0054 9e 00 00 stz $3a0000,x mclean1 stz $0,b,x .3a0057 e8 inx inx .3a0058 d0 fa bne $3a0054 bne mclean1 .3a005a e6 6e inc $6e inc TMP .3a005c 88 dey dey .3a005d d0 ee bne $3a004d bne mclean0 ; 2. clear stacks .3a005f 48 pha pha ; begin setdbr macro .3a0060 08 php php .3a0061 e2 20 sep #$20 SEP #$20 ; set A short .as .3a0063 a9 3a lda #$3a lda #`msg_sclean .3a0065 48 pha pha .3a0066 ab plb plb .databank `msg_sclean .3a0067 28 plp plp .3a0068 68 pla pla ; end setdbr macro .3a0069 a2 14 07 ldx #$0714 ldx #<>msg_sclean .3a006c 20 7d 01 jsr $3a017d jsr prints .3a006f 48 pha pha ; begin setdbr macro .3a0070 08 php php .3a0071 e2 20 sep #$20 SEP #$20 ; set A short .as .3a0073 a9 01 lda #$01 lda #MEM_SEGMENT .3a0075 48 pha pha .3a0076 ab plb plb .databank MEM_SEGMENT .3a0077 28 plp plp .3a0078 68 pla pla ; end setdbr macro .3a0079 c2 20 rep #$20 REP #$20 ; set A long .al .3a007b a2 fe 03 ldx #$03fe ldx #STACK_DEPTH-2 .3a007e 9e 00 00 stz $010000,x prep0 stz #DSTACK,b,x .3a0081 ca dex dex .3a0082 ca dex dex .3a0083 10 f9 bpl $3a007e bpl prep0 .3a0085 a2 fe 03 ldx #$03fe ldx #ADDRESSES-2 .3a0088 9e 00 04 stz $010400,x prep1 stz #RSTACK,b,x .3a008b ca dex dex .3a008c ca dex dex .3a008d 10 f9 bpl $3a0088 bpl prep1 ; 4. copy image .3a008f 48 pha pha ; begin setdbr macro .3a0090 08 php php .3a0091 e2 20 sep #$20 SEP #$20 ; set A short .as .3a0093 a9 3a lda #$3a lda #`msg_copy .3a0095 48 pha pha .3a0096 ab plb plb .databank `msg_copy .3a0097 28 plp plp .3a0098 68 pla pla ; end setdbr macro .3a0099 a2 27 07 ldx #$0727 ldx #<>msg_copy .3a009c 20 7d 01 jsr $3a017d jsr prints .3a009f e2 20 sep #$20 SEP #$20 ; set A short .as .3a00a1 a0 7c 94 ldy #$947c ldy #IMAGE_SIZE .3a00a4 a2 00 00 ldx #$0000 ldx #0 .databank ? .3a00a7 bf 1d 08 3a lda $3a081d,x copy0 lda IMAGE_SRC,x .3a00ab 9f 00 00 02 sta $020000,x sta IMAGE_ADDR,x .3a00af e8 inx inx .3a00b0 88 dey dey .3a00b1 d0 f4 bne $3a00a7 bne copy0 ; 4. set DBR to stack area .3a00b3 48 pha pha ; begin setdbr macro .3a00b4 08 php php .3a00b5 e2 20 sep #$20 SEP #$20 ; set A short .as .3a00b7 a9 01 lda #$01 lda #MEM_SEGMENT .3a00b9 48 pha pha .3a00ba ab plb plb .databank MEM_SEGMENT .3a00bb 28 plp plp .3a00bc 68 pla pla ; end setdbr macro .3a00bd 60 rts rts ; ## main execute loop .3a00be execute .3a00be c2 30 rep #$30 REP #$30 ; set A&X long .al .xl .3a00c0 a9 04 00 lda #$0004 lda #CELL_SIZE .3a00c3 85 68 sta $68 sta RP .3a00c5 64 66 stz $66 stz SP .3a00c7 64 60 stz $60 stz IP .3a00c9 20 58 01 jsr $3a0158 jsr update_ipptr .3a00cc 20 e2 00 jsr $3a00e2 execute0 jsr process_bundle .3a00cf 42 04 wdm #$04 wdm #4 ; debugging - op count .3a00d1 a5 68 lda $68 lda RP .3a00d3 f0 0c beq $3a00e1 beq quit .3a00d5 20 6f 01 jsr $3a016f jsr next_ipptr .3a00d8 e6 60 inc $60 inc IP .3a00da a5 60 lda $60 lda IP .3a00dc c9 ff ff cmp #$ffff cmp #CELL_MAX ; NGA exit condition .3a00df 90 eb bcc $3a00cc bcc execute0 .3a00e1 60 rts quit rts ; ### process 4 commands in bundle .3a00e2 process_bundle .3a00e2 a0 02 00 ldy #$0002 ldy #2 .3a00e5 b7 62 lda [$62],y lda [IPPTR],y ; 7 cycles .3a00e7 85 6c sta $6c sta CMD+2 .3a00e9 a7 62 lda [$62] lda [IPPTR] ; also 7 cycles .3a00eb 85 6a sta $6a sta CMD .3a00ed 29 ff 00 and #$00ff and #$ff .3a00f0 f0 05 beq $3a00f7 beq + ; skip .. (nop) .3a00f2 0a asl a asl a .3a00f3 aa tax tax .3a00f4 fc 1c 01 jsr ($3a011c,x) jsr (#<>op_table,k,x) .3a00f7 a5 6b lda $6b + lda CMD+1 .3a00f9 29 ff 00 and #$00ff and #$ff .3a00fc f0 05 beq $3a0103 beq + ; skip .. (nop) .3a00fe 0a asl a asl a .3a00ff aa tax tax .3a0100 fc 1c 01 jsr ($3a011c,x) jsr (#<>op_table,k,x) .3a0103 a5 6c lda $6c + lda CMD+2 .3a0105 29 ff 00 and #$00ff and #$ff .3a0108 f0 05 beq $3a010f beq + ; skip .. (nop) .3a010a 0a asl a asl a .3a010b aa tax tax .3a010c fc 1c 01 jsr ($3a011c,x) jsr (#<>op_table,k,x) .3a010f a5 6d lda $6d + lda CMD+3 .3a0111 29 ff 00 and #$00ff and #$ff .3a0114 f0 05 beq $3a011b beq + ; bne/rts for -1 cycle .3a0116 0a asl a asl a .3a0117 aa tax tax .3a0118 fc 1c 01 jsr ($3a011c,x) jsr (#<>op_table,k,x) .3a011b 60 rts + rts .3a011c op_table >3a011c 90 01 .addr inst_no >3a011e 91 01 .addr inst_li >3a0120 ad 01 .addr inst_du >3a0122 c3 01 .addr inst_dr >3a0124 db 01 .addr inst_sw >3a0126 f8 01 .addr inst_pu >3a0128 12 02 .addr inst_po >3a012a 31 02 .addr inst_ju >3a012c 3f 02 .addr inst_ca >3a012e 5b 02 .addr inst_cc >3a0130 94 02 .addr inst_re >3a0132 a6 02 .addr inst_eq >3a0134 d0 02 .addr inst_ne >3a0136 fa 02 .addr inst_lt >3a0138 27 03 .addr inst_gt >3a013a 54 03 .addr inst_fe >3a013c e7 03 .addr inst_st >3a013e 13 04 .addr inst_ad >3a0140 2b 04 .addr inst_su >3a0142 43 04 .addr inst_mu >3a0144 a3 04 .addr inst_di >3a0146 55 05 .addr inst_an >3a0148 6c 05 .addr inst_or >3a014a 83 05 .addr inst_xo >3a014c 9a 05 .addr inst_sh >3a014e 06 06 .addr inst_zr >3a0150 27 06 .addr inst_ha >3a0152 2d 06 .addr inst_ie >3a0154 40 06 .addr inst_iq >3a0156 4c 06 .addr inst_ii ;---------------------------------------------------------- ; ## tooling routines ; ### updates IPPTR (in bytes) from IP field (in cells) .3a0158 update_ipptr .3a0158 a5 60 lda $60 lda IP .3a015a 85 62 sta $62 sta IPPTR .3a015c 64 64 stz $64 stz IPPTR+2 .3a015e 06 62 asl $62 asl IPPTR ; IPPTR = IP*4 .3a0160 26 64 rol $64 rol IPPTR+2 .3a0162 06 62 asl $62 asl IPPTR .3a0164 26 64 rol $64 rol IPPTR+2 .3a0166 18 clc clc ; add base .3a0167 a5 64 lda $64 lda IPPTR+2 .3a0169 69 02 00 adc #$0002 adc #`IMAGE_ADDR .3a016c 85 64 sta $64 sta IPPTR+2 .3a016e 60 rts rts ; ### increases in-memory IPPTR pointer by CELL_SIZE .3a016f next_ipptr .3a016f a5 62 lda $62 lda IPPTR .3a0171 18 clc clc .3a0172 69 04 00 adc #$0004 adc #CELL_SIZE .3a0175 85 62 sta $62 sta IPPTR .3a0177 b0 01 bcs $3a017a bcs + .3a0179 60 rts rts .3a017a e6 64 inc $64 + inc IPPTR+2 .3a017c 60 rts rts ; ### print 0-terminated strings ; DBR - string segment ; X - string address .3a017d prints .proc .3a017d 08 php php .3a017e e2 20 sep #$20 SEP #$20 ; set A short .as .3a0180 c2 10 rep #$10 REP #$10 ; set X long .xl .3a0182 bd 00 00 lda $010000,x prints0 lda $0,b,x .3a0185 f0 07 beq $3a018e beq prints_done .3a0187 22 18 10 00 jsl $001018 jsl C256_PUTC .3a018b e8 inx inx .3a018c 80 f4 bra $3a0182 bra prints0 .3a018e 28 plp prints_done plp .3a018f 60 rts rts .pend ;---------------------------------------------------------- ; # NGA VM ; ; Implementation of nga VM, based on `vm/nga-c/nga.c` code. ; Current version may be suboptimal, but the goal is in most ; accurate implementation. ; .al .xl ; --------------------------------------------------------- ; ## .. ( 0) stack: - | - nop .3a0190 inst_no .3a0190 60 rts rts ; --------------------------------------------------------- ; ## li ( 1) stack: -n | - lit ; ; void inst_li() { ; sp++; ; ip++; ; TOS = memory[ip]; ; } .3a0191 inst_li .3a0191 a5 66 lda $66 lda SP ; 4 cycles .3a0193 18 clc clc ; 1 cycle .3a0194 69 04 00 adc #$0004 adc #CELL_SIZE ; 3 cycles .3a0197 85 66 sta $66 sta SP ; 4 cycles .3a0199 aa tax tax ; 2 cycles .3a019a e6 60 inc $60 inc IP .3a019c 20 6f 01 jsr $3a016f jsr next_ipptr .3a019f a7 62 lda [$62] lda [IPPTR] .3a01a1 9d 04 00 sta $010004,x sta #TOSl,b,x .3a01a4 a0 02 00 ldy #$0002 ldy #2 .3a01a7 b7 62 lda [$62],y lda [IPPTR],y .3a01a9 9d 06 00 sta $010006,x sta #TOSh,b,x ; lda IP ; 4 cycles ; clc ; 1 cycle ; adc #4 ; 3 cycles ; sta IP ; 4 cycles ; tay ; 2 cycles ; lda #MEMl,b,y ; sta #TOSl,b,x ; lda #MEMh,b,y ; sta #TOSh,b,x .3a01ac 60 rts rts ; --------------------------------------------------------- ; ## du ( 2) stack: n-nn | - dup ; ; void inst_du() { ; sp++; ; data[sp] = NOS; // it means TOS = NOS? ; } .3a01ad inst_du .3a01ad a5 66 lda $66 lda SP ; 4 cycles .3a01af 18 clc clc ; 1 cycle .3a01b0 69 04 00 adc #$0004 adc #CELL_SIZE ; 3 cycles .3a01b3 85 66 sta $66 sta SP ; 4 cycles .3a01b5 aa tax tax ; 2 cycles .3a01b6 bd 00 00 lda $010000,x lda #NOSl,b,x .3a01b9 9d 04 00 sta $010004,x sta #TOSl,b,x .3a01bc bd 02 00 lda $010002,x lda #NOSh,b,x .3a01bf 9d 06 00 sta $010006,x sta #TOSh,b,x .3a01c2 60 rts rts ; --------------------------------------------------------- ; ## dr ( 3) stack: n- | - drop ; ; void inst_dr() { ; data[sp] = 0; // it means TOS=0? ; if (--sp < 0) ; ip = CELL_MAX; ; } .3a01c3 inst_dr .3a01c3 a6 66 ldx $66 ldx SP .3a01c5 9e 04 00 stz $010004,x stz #TOSl,b,x .3a01c8 9e 06 00 stz $010006,x stz #TOSh,b,x .3a01cb 8a txa txa .3a01cc 38 sec sec .3a01cd e9 04 00 sbc #$0004 sbc #4 .3a01d0 85 66 sta $66 sta SP .3a01d2 30 01 bmi $3a01d5 bmi inst_dr0 .3a01d4 60 rts rts ; IP+1 in exec loop == LIMIT == EXIT .3a01d5 a9 fe ff lda #$fffe inst_dr0 lda #CELL_MAX-1 .3a01d8 85 60 sta $60 sta IP .3a01da 60 rts rts ; --------------------------------------------------------- ; ## sw ( 4) stack: xy-xy | - swap ; ; void inst_dr() { ; data[sp] = 0; // it means TOS=0? ; if (--sp < 0) ; ip = CELL_MAX; ; } .3a01db inst_sw .3a01db a6 66 ldx $66 ldx SP .3a01dd bc 04 00 ldy $010004,x ldy #TOSl,b,x ; TOS -> TMP .3a01e0 bd 00 00 lda $010000,x lda #NOSl,b,x .3a01e3 9d 04 00 sta $010004,x sta #TOSl,b,x ; NOS -> TOS .3a01e6 98 tya tya .3a01e7 9d 00 00 sta $010000,x sta #NOSl,b,x ; TMP -> NOS .3a01ea bc 06 00 ldy $010006,x ldy #TOSh,b,x ; TOS -> TMP .3a01ed bd 02 00 lda $010002,x lda #NOSh,b,x .3a01f0 9d 06 00 sta $010006,x sta #TOSh,b,x ; NOS -> TOS .3a01f3 98 tya tya .3a01f4 9d 02 00 sta $010002,x sta #NOSh,b,x ; TMP -> NOS .3a01f7 60 rts rts ; --------------------------------------------------------- ; ## pu ( 5) stack: n- | -n push ; ; void inst_pu() { ; rp++; ; TORS = TOS; ; inst_dr(); ; } .3a01f8 inst_pu .3a01f8 a5 68 lda $68 lda RP ; 4 cycles .3a01fa 18 clc clc ; 1 cycle .3a01fb 69 04 00 adc #$0004 adc #CELL_SIZE ; 3 cycles .3a01fe 85 68 sta $68 sta RP ; 4 cycles .3a0200 a8 tay tay ; 2 cycles .3a0201 a6 66 ldx $66 ldx SP .3a0203 bd 04 00 lda $010004,x lda #TOSl,b,x .3a0206 99 00 04 sta $010400,y sta #TRSl,b,y .3a0209 bd 06 00 lda $010006,x lda #TOSh,b,x .3a020c 99 02 04 sta $010402,y sta #TRSh,b,y .3a020f 4c c3 01 jmp $3a01c3 jmp inst_dr ; --------------------------------------------------------- ; ## po ( 6) stack: -n | n- pop ; ; void inst_po() { ; sp++; ; TOS = TORS; ; rp--; ; } .3a0212 inst_po .3a0212 a5 66 lda $66 lda SP .3a0214 18 clc clc .3a0215 69 04 00 adc #$0004 adc #CELL_SIZE .3a0218 85 66 sta $66 sta SP .3a021a aa tax tax .3a021b a4 68 ldy $68 ldy RP .3a021d b9 00 04 lda $010400,y lda #TRSl,b,y .3a0220 9d 04 00 sta $010004,x sta #TOSl,b,x .3a0223 b9 02 04 lda $010402,y lda #TRSh,b,y .3a0226 9d 06 00 sta $010006,x sta #TOSh,b,x .3a0229 98 tya tya .3a022a 38 sec sec .3a022b e9 04 00 sbc #$0004 sbc #4 .3a022e 85 68 sta $68 sta RP .3a0230 60 rts rts ; --------------------------------------------------------- ; ## ju ( 7) stack: a- | - jump ; ; void inst_ju() { ; ip = TOS - 1; // I'm not sure about that '-1' ; inst_dr(); ; } ; PROBLEM THERE - SP is 16-bit and argument to JUMP may ; be 32bit XXX - check it in already created image ; BUT - current image < 64k, so there shouldn't be problems .3a0231 inst_ju .3a0231 a6 66 ldx $66 ldx SP .3a0233 bd 04 00 lda $010004,x lda #TOSl,b,x .3a0236 3a dec a dec a .3a0237 85 60 sta $60 sta IP .3a0239 20 58 01 jsr $3a0158 jsr update_ipptr .3a023c 4c c3 01 jmp $3a01c3 jmp inst_dr ; --------------------------------------------------------- ; ## ca ( 8) stack: a- | -A call ; ; void inst_ca() { ; rp++; ; TORS = ip; ; ip = TOS - 1; ; inst_dr(); ; } .3a023f inst_ca .3a023f a5 68 lda $68 lda RP .3a0241 18 clc clc .3a0242 69 04 00 adc #$0004 adc #CELL_SIZE .3a0245 85 68 sta $68 sta RP .3a0247 a8 tay tay .3a0248 a5 60 lda $60 lda IP .3a024a 99 00 04 sta $010400,y sta #TRSl,b,y ; for completness sake .3a024d a6 66 ldx $66 ldx SP .3a024f bd 04 00 lda $010004,x lda #TOSl,b,x .3a0252 3a dec a dec a .3a0253 85 60 sta $60 sta IP .3a0255 20 58 01 jsr $3a0158 jsr update_ipptr .3a0258 4c c3 01 jmp $3a01c3 jmp inst_dr ; --------------------------------------------------------- ; ## cc ( 9) stack: af- | -A conditional call ; ; void inst_cc() { ; CELL a, b; ; a = TOS; inst_dr(); /* Target */ ; b = TOS; inst_dr(); /* Flag */ ; if (b != 0) { ; rp++; ; TORS = ip; ; ip = a - 1; ; } ; } .3a025b inst_cc .3a025b a6 66 ldx $66 ldx SP ; a .3a025d bd 04 00 lda $010004,x lda #TOSl,b,x .3a0260 85 6e sta $6e sta TMP .3a0262 20 c3 01 jsr $3a01c3 jsr inst_dr .3a0265 a6 66 ldx $66 ldx SP .3a0267 bd 04 00 lda $010004,x lda #TOSl,b,x .3a026a d0 08 bne $3a0274 bne inst_cc_jmp .3a026c bd 06 00 lda $010006,x lda #TOSh,b,x .3a026f d0 03 bne $3a0274 bne inst_cc_jmp .3a0271 4c c3 01 jmp $3a01c3 jmp inst_dr .3a0274 20 c3 01 jsr $3a01c3 inst_cc_jmp jsr inst_dr ; for compatibility .3a0277 a5 68 lda $68 lda RP .3a0279 18 clc clc .3a027a 69 04 00 adc #$0004 adc #CELL_SIZE .3a027d 85 68 sta $68 sta RP .3a027f a8 tay tay .3a0280 a5 60 lda $60 lda IP .3a0282 99 00 04 sta $010400,y sta #TRSl,b,y .3a0285 a9 00 00 lda #$0000 lda #$0 .3a0288 99 02 04 sta $010402,y sta #TRSh,b,y ; only lower.. .3a028b a5 6e lda $6e lda TMP .3a028d 3a dec a dec a .3a028e 85 60 sta $60 sta IP .3a0290 20 58 01 jsr $3a0158 jsr update_ipptr .3a0293 60 rts rts ;jmp inst_dr ; --------------------------------------------------------- ; ## re (10) stack: - | A- return ; ; void inst_re() { ; ip = TORS; ; rp--; ; } .3a0294 inst_re .3a0294 a4 68 ldy $68 ldy RP .3a0296 b9 00 04 lda $010400,y lda #TRSl,b,y .3a0299 85 60 sta $60 sta IP .3a029b 20 58 01 jsr $3a0158 jsr update_ipptr .3a029e 98 tya tya .3a029f 38 sec sec .3a02a0 e9 04 00 sbc #$0004 sbc #4 .3a02a3 85 68 sta $68 sta RP .3a02a5 60 rts rts ; --------------------------------------------------------- ; ## eq (11) stack: xy-f | - equality ; ; void inst_eq() { ; NOS = (NOS == TOS) ? -1 : 0; ; inst_dr(); ; } .3a02a6 inst_eq .3a02a6 a6 66 ldx $66 ldx SP .3a02a8 bd 00 00 lda $010000,x lda #NOSl,b,x .3a02ab dd 04 00 cmp $010004,x cmp #TOSl,b,x .3a02ae d0 17 bne $3a02c7 bne inst_eq_no .3a02b0 bd 02 00 lda $010002,x lda #NOSh,b,x .3a02b3 dd 06 00 cmp $010006,x cmp #TOSh,b,x .3a02b6 d0 0f bne $3a02c7 bne inst_eq_no .3a02b8 a9 ff ff lda #$ffff lda #<>-1 .3a02bb 9d 00 00 sta $010000,x sta #NOSl,b,x .3a02be a9 ff ff lda #$ffff lda #>`-1 .3a02c1 9d 02 00 sta $010002,x sta #NOSh,b,x .3a02c4 4c c3 01 jmp $3a01c3 jmp inst_dr .3a02c7 9e 00 00 stz $010000,x inst_eq_no stz #NOSl,b,x .3a02ca 9e 02 00 stz $010002,x stz #NOSh,b,x .3a02cd 4c c3 01 jmp $3a01c3 jmp inst_dr ; --------------------------------------------------------- ; ## ne (12) stack: xy-f | - inequality ; ; void inst_eq() { ; NOS = (NOS != TOS) ? -1 : 0; ; inst_dr(); ; } .3a02d0 inst_ne .3a02d0 a6 66 ldx $66 ldx SP .3a02d2 bd 00 00 lda $010000,x lda #NOSl,b,x .3a02d5 dd 04 00 cmp $010004,x cmp #TOSl,b,x .3a02d8 d0 11 bne $3a02eb bne inst_ne_no .3a02da bd 02 00 lda $010002,x lda #NOSh,b,x .3a02dd dd 06 00 cmp $010006,x cmp #TOSh,b,x .3a02e0 d0 09 bne $3a02eb bne inst_ne_no .3a02e2 9e 00 00 stz $010000,x stz #NOSl,b,x .3a02e5 9e 02 00 stz $010002,x stz #NOSh,b,x .3a02e8 4c c3 01 jmp $3a01c3 jmp inst_dr .3a02eb a9 ff ff lda #$ffff inst_ne_no lda #<>-1 .3a02ee 9d 00 00 sta $010000,x sta #NOSl,b,x .3a02f1 a9 ff ff lda #$ffff lda #>`-1 .3a02f4 9d 02 00 sta $010002,x sta #NOSh,b,x .3a02f7 4c c3 01 jmp $3a01c3 jmp inst_dr ; --------------------------------------------------------- ; ## lt (13) stack: xy-f | - less than ; ; void inst_eq() { ; NOS = (NOS < TOS) ? -1 : 0; ; inst_dr(); ; } ; it should be a signed comparison then ; http://www.6502.org/tutorials/compare_beyond.html#5 .3a02fa inst_lt .3a02fa a6 66 ldx $66 ldx SP .3a02fc bd 00 00 lda $010000,x lda #NOSl,b,x .3a02ff dd 04 00 cmp $010004,x cmp #TOSl,b,x .3a0302 bd 02 00 lda $010002,x lda #NOSh,b,x .3a0305 fd 06 00 sbc $010006,x sbc #TOSh,b,x .3a0308 50 03 bvc $3a030d bvc inst_lt0 ; N eor V .3a030a 49 80 00 eor #$0080 eor #$80 .3a030d 30 09 bmi $3a0318 inst_lt0 bmi inst_lt_lt .3a030f 9e 00 00 stz $010000,x stz #NOSl,b,x .3a0312 9e 02 00 stz $010002,x stz #NOSh,b,x .3a0315 4c c3 01 jmp $3a01c3 jmp inst_dr .3a0318 a9 ff ff lda #$ffff inst_lt_lt lda #<>-1 .3a031b 9d 00 00 sta $010000,x sta #NOSl,b,x .3a031e a9 ff ff lda #$ffff lda #>`-1 .3a0321 9d 02 00 sta $010002,x sta #NOSh,b,x .3a0324 4c c3 01 jmp $3a01c3 jmp inst_dr ; --------------------------------------------------------- ; ## gt (14) stack: xy-f | - greater than ; ; void inst_eq() { ; NOS = (NOS > TOS) ? -1 : 0; ; inst_dr(); ; } ; it should be a signed comparison then ; http://www.6502.org/tutorials/compare_beyond.html#5 .3a0327 inst_gt .3a0327 a6 66 ldx $66 ldx SP .3a0329 bd 04 00 lda $010004,x lda #TOSl,b,x .3a032c dd 00 00 cmp $010000,x cmp #NOSl,b,x .3a032f bd 06 00 lda $010006,x lda #TOSh,b,x .3a0332 fd 02 00 sbc $010002,x sbc #NOSh,b,x .3a0335 50 03 bvc $3a033a bvc inst_gt0 ; N eor V .3a0337 49 80 00 eor #$0080 eor #$80 .3a033a 30 09 bmi $3a0345 inst_gt0 bmi inst_gt_gt .3a033c 9e 00 00 stz $010000,x stz #NOSl,b,x .3a033f 9e 02 00 stz $010002,x stz #NOSh,b,x .3a0342 4c c3 01 jmp $3a01c3 jmp inst_dr .3a0345 a9 ff ff lda #$ffff inst_gt_gt lda #<>-1 .3a0348 9d 00 00 sta $010000,x sta #NOSl,b,x .3a034b a9 ff ff lda #$ffff lda #>`-1 .3a034e 9d 02 00 sta $010002,x sta #NOSh,b,x .3a0351 4c c3 01 jmp $3a01c3 jmp inst_dr ; --------------------------------------------------------- ; ## fe (15) stack: a-n | - fetch ; ; void inst_fe() { ; #ifndef NOCHECKS ; if (TOS >= CELL_MAX || TOS < -5) { ; ip = CELL_MAX; ; printf("\nERROR (nga/inst_fe): Fetch beyond valid memory range\n"); ; exit(1); ; } else { ; #endif ; switch (TOS) { ; case -1: TOS = sp - 1; break; ; case -2: TOS = rp; break; ; case -3: TOS = CELL_MAX; break; ; case -4: TOS = CELL_MIN_VAL; break; ; case -5: TOS = CELL_MAX_VAL; break; ; default: TOS = memory[TOS]; break; ; } ; #ifndef NOCHECKS ; } ; #endif ; } ; XXX - there no checks now, as we don't have a way ; to report them ; .3a0354 inst_fe .3a0354 a6 66 ldx $66 ldx SP .3a0356 bd 06 00 lda $010006,x lda #TOSh,b,x .3a0359 30 27 bmi $3a0382 bmi inst_fe0 ; special values .3a035b bd 04 00 lda $010004,x lda #TOSl,b,x ; only 16 bit .3a035e 85 6e sta $6e sta TMP .3a0360 64 70 stz $70 stz TMP+2 .3a0362 06 6e asl $6e asl TMP ; IPPTR = IP*4 .3a0364 26 70 rol $70 rol TMP+2 .3a0366 06 6e asl $6e asl TMP .3a0368 26 70 rol $70 rol TMP+2 .3a036a 18 clc clc ; add base .3a036b a5 70 lda $70 lda TMP+2 .3a036d 69 02 00 adc #$0002 adc #`IMAGE_ADDR .3a0370 85 70 sta $70 sta TMP+2 .3a0372 a5 6e lda $6e lda TMP .3a0374 a7 6e lda [$6e] lda [TMP] .3a0376 9d 04 00 sta $010004,x sta #TOSl,b,x .3a0379 a0 02 00 ldy #$0002 ldy #2 .3a037c b7 6e lda [$6e],y lda [TMP],y .3a037e 9d 06 00 sta $010006,x sta #TOSh,b,x .3a0381 60 rts rts .3a0382 bd 04 00 lda $010004,x inst_fe0 lda #TOSl,b,x .3a0385 1a inc a inc a ; it was -1? .3a0386 d0 0c bne $3a0394 bne inst_fe1 ; no .3a0388 a5 66 lda $66 lda SP ; "TOS = sp-1" .3a038a 3a dec a dec a .3a038b 4a lsr a lsr a ; SP in bytes .3a038c 4a lsr a lsr a ; stack uses cells .3a038d 9d 04 00 sta $010004,x sta #TOSl,b,x .3a0390 9e 06 00 stz $010006,x stz #TOSh,b,x .3a0393 60 rts rts .3a0394 1a inc a inst_fe1 inc a ; it was -2? .3a0395 d0 0b bne $3a03a2 bne inst_fe2 .3a0397 a5 68 lda $68 lda RP ; "TOS = rp" .3a0399 4a lsr a lsr a .3a039a 4a lsr a lsr a .3a039b 9d 04 00 sta $010004,x sta #TOSl,b,x .3a039e 9e 06 00 stz $010006,x stz #TOSh,b,x .3a03a1 60 rts rts .3a03a2 1a inc a inst_fe2 inc a ; it was -3? .3a03a3 d0 0a bne $3a03af bne inst_fe3 .3a03a5 a9 ff ff lda #$ffff lda #CELL_MAX ; "TOS = CELL_MAX" .3a03a8 9d 04 00 sta $010004,x sta #TOSl,b,x .3a03ab 9e 06 00 stz $010006,x stz #TOSh,b,x ; XXX - we uses max 64k .3a03ae 60 rts rts .3a03af 1a inc a inst_fe3 inc a ; it was -4? .3a03b0 d0 0d bne $3a03bf bne inst_fe4 .3a03b2 a9 00 00 lda #$0000 lda #$0000 ; "TOS = CELL_MIN_VAL" .3a03b5 9d 04 00 sta $010004,x sta #TOSl,b,x .3a03b8 a9 00 80 lda #$8000 lda #$8000 ; XXX - check it .3a03bb 9d 06 00 sta $010006,x sta #TOSh,b,x .3a03be 60 rts rts .3a03bf 1a inc a inst_fe4 inc a ; it was -5? .3a03c0 d0 0d bne $3a03cf bne inst_bad .3a03c2 a9 ff ff lda #$ffff lda #$ffff ; "TOS = CELL_MAX_VAL" .3a03c5 9d 04 00 sta $010004,x sta #TOSl,b,x .3a03c8 a9 ff 7f lda #$7fff lda #$7fff ; XXX - check it .3a03cb 9d 06 00 sta $010006,x sta #TOSh,b,x .3a03ce 60 rts rts .3a03cf inst_bad ; XXX - message to interpreter .3a03cf 48 pha pha ; begin setdbr macro .3a03d0 08 php php .3a03d1 e2 20 sep #$20 SEP #$20 ; set A short .as .3a03d3 a9 3a lda #$3a lda #`err_memuf .3a03d5 48 pha pha .3a03d6 ab plb plb .databank `err_memuf .3a03d7 28 plp plp .3a03d8 68 pla pla ; end setdbr macro .3a03d9 a2 eb 07 ldx #$07eb ldx #<>err_memuf .3a03dc 20 7d 01 jsr $3a017d jsr prints .3a03df c2 30 rep #$30 REP #$30 ; set A&X long .al .xl .3a03e1 a9 fe ff lda #$fffe lda #CELL_MAX-1 .3a03e4 85 60 sta $60 sta IP .3a03e6 60 rts rts ; --------------------------------------------------------- ; ## st (16) stack: na- | - store ; ; void inst_st() { ; #ifndef NOCHECKS ; if (TOS <= CELL_MAX && TOS >= 0) { ; #endif ; memory[TOS] = NOS; ; inst_dr(); ; inst_dr(); ; #ifndef NOCHECKS ; } else { ; ip = CELL_MAX; ; printf("\nERROR (nga/inst_st): Store beyond valid memory range\n"); ; exit(1); ; } ; #endif ; } ; XXX - no checks now .3a03e7 inst_st .3a03e7 a6 66 ldx $66 ldx SP .3a03e9 bd 04 00 lda $3a0004,x lda #TOSl,b,x ; XXX only low word in use .3a03ec 85 6e sta $6e sta TMP .3a03ee 64 70 stz $70 stz TMP+2 .3a03f0 06 6e asl $6e asl TMP ; IPPTR = IP*4 .3a03f2 26 70 rol $70 rol TMP+2 .3a03f4 06 6e asl $6e asl TMP .3a03f6 26 70 rol $70 rol TMP+2 .3a03f8 18 clc clc ; add base .3a03f9 a5 70 lda $70 lda TMP+2 .3a03fb 69 02 00 adc #$0002 adc #`IMAGE_ADDR .3a03fe 85 70 sta $70 sta TMP+2 .3a0400 bd 00 00 lda $3a0000,x lda #NOSl,b,x .3a0403 87 6e sta [$6e] sta [TMP] .3a0405 a0 02 00 ldy #$0002 ldy #2 .3a0408 bd 02 00 lda $3a0002,x lda #NOSh,b,x .3a040b 97 6e sta [$6e],y sta [TMP],y .3a040d 20 c3 01 jsr $3a01c3 jsr inst_dr .3a0410 4c c3 01 jmp $3a01c3 jmp inst_dr ; --------------------------------------------------------- ; ## ad (17) stack: xy-n | - addition ; ; void inst_ad() { ; NOS += TOS; ; inst_dr(); ; } .3a0413 inst_ad .3a0413 a6 66 ldx $66 ldx SP .3a0415 18 clc clc .3a0416 bd 00 00 lda $3a0000,x lda #NOSl,b,x .3a0419 7d 04 00 adc $3a0004,x adc #TOSl,b,x .3a041c 9d 00 00 sta $3a0000,x sta #NOSl,b,x .3a041f bd 02 00 lda $3a0002,x lda #NOSh,b,x .3a0422 7d 06 00 adc $3a0006,x adc #TOSh,b,x .3a0425 9d 02 00 sta $3a0002,x sta #NOSh,b,x .3a0428 4c c3 01 jmp $3a01c3 jmp inst_dr ; --------------------------------------------------------- ; ## su (18) stack: xy-n | - subtraction ; ; void inst_su() { ; NOS -= TOS; ; inst_dr(); ; } .3a042b inst_su .3a042b a6 66 ldx $66 ldx SP .3a042d 38 sec sec .3a042e bd 00 00 lda $3a0000,x lda #NOSl,b,x .3a0431 fd 04 00 sbc $3a0004,x sbc #TOSl,b,x .3a0434 9d 00 00 sta $3a0000,x sta #NOSl,b,x .3a0437 bd 02 00 lda $3a0002,x lda #NOSh,b,x .3a043a fd 06 00 sbc $3a0006,x sbc #TOSh,b,x .3a043d 9d 02 00 sta $3a0002,x sta #NOSh,b,x .3a0440 4c c3 01 jmp $3a01c3 jmp inst_dr ; --------------------------------------------------------- ; ## mu (19) stack: xy-n | - multiplication ; ; void inst_mu() { ; NOS *= TOS; ; inst_dr(); ; } ; taken almost verbatim from of816 forth: ; 32-bit unsigned multiplication with 64-bit result ; right-shifting version by dclxvi =$6e N = TMP .3a0443 inst_mu .3a0443 a6 66 ldx $66 ldx SP ; only for 1:1 with original nga .3a0445 bd 06 00 lda $3a0006,x lda #TOSh,b,x .3a0448 48 pha pha .3a0449 bd 04 00 lda $3a0004,x lda #TOSl,b,x .3a044c 48 pha pha ; end .3a044d a5 70 lda $70 lda N+2 .3a044f 48 pha pha .3a0450 a5 6e lda $6e lda N .3a0452 48 pha pha .3a0453 a9 00 00 lda #$0000 lda #$00 .3a0456 85 6e sta $6e sta N .3a0458 a0 20 00 ldy #$0020 ldy #32 .3a045b 5e 06 00 lsr $3a0006,x lsr #TOSh,b,x ; STACKBASE+6,x .3a045e 7e 04 00 ror $3a0004,x ror #TOSl,b,x ; STACKBASE+4,x .3a0461 90 0f bcc $3a0472 l1: bcc l2 .3a0463 18 clc clc .3a0464 85 70 sta $70 sta N+2 .3a0466 a5 6e lda $6e lda N .3a0468 7d 00 00 adc $3a0000,x adc #NOSl,b,x ; STACKBASE+0,x .3a046b 85 6e sta $6e sta N .3a046d a5 70 lda $70 lda N+2 .3a046f 7d 02 00 adc $3a0002,x adc #NOSh,b,x ; STACKBASE+2,x .3a0472 6a ror a l2: ror a .3a0473 66 6e ror $6e ror N .3a0475 7e 06 00 ror $3a0006,x ror #TOSh,b,x ; STACKBASE+6,x .3a0478 7e 04 00 ror $3a0004,x ror #TOSl,b,x ; STACKBASE+4,x .3a047b 88 dey dey .3a047c d0 e3 bne $3a0461 bne l1 .3a047e 9d 02 00 sta $3a0002,x sta #NOSh,b,x ; STACKBASE+2,x .3a0481 a5 6e lda $6e lda N .3a0483 9d 00 00 sta $3a0000,x sta #NOSl,b,x ; STACKBASE+0,x .3a0486 68 pla pla .3a0487 85 6e sta $6e sta N .3a0489 68 pla pla .3a048a 85 70 sta $70 sta N+2 ; only for 1:1 with original nga - XXX - fix it .3a048c bd 04 00 lda $3a0004,x lda #TOSl,b,x .3a048f 9d 00 00 sta $3a0000,x sta #NOSl,b,x .3a0492 bd 06 00 lda $3a0006,x lda #TOSh,b,x .3a0495 9d 02 00 sta $3a0002,x sta #NOSh,b,x ; .3a0498 68 pla pla .3a0499 9d 04 00 sta $3a0004,x sta #TOSl,b,x .3a049c 68 pla pla .3a049d 9d 06 00 sta $3a0006,x sta #TOSh,b,x ; end .3a04a0 4c c3 01 jmp $3a01c3 jmp inst_dr ; --------------------------------------------------------- ; ## di (20) stack: xy-rq | - divide & remainder ; ; void inst_di() { ; CELL a, b; ; a = TOS; ; b = NOS; ; #ifndef NOCHECKS ; if (a == 0) { ; printf("\nERROR (nga/inst_di): Division by zero\n"); ; exit(1); ; } ; #endif ; TOS = b / a; ; NOS = b % a; ; } ; XXX - now all operation are unsigned, change this! .warn "inst_di is unsigned, change it" .3a04a3 inst_di .3a04a3 a6 66 ldx $66 ldx SP .3a04a5 bd 04 00 lda $3a0004,x lda #TOSl,b,x .3a04a8 d0 27 bne $3a04d1 bne di4 .3a04aa bd 06 00 lda $3a0006,x lda #TOSh,b,x .3a04ad d0 22 bne $3a04d1 bne di4 .3a04af 48 pha pha ; begin setdbr macro .3a04b0 08 php php .3a04b1 e2 20 sep #$20 SEP #$20 ; set A short .as .3a04b3 a9 3a lda #$3a lda #`err_0div .3a04b5 48 pha pha .3a04b6 ab plb plb .databank `err_0div .3a04b7 28 plp plp .3a04b8 68 pla pla ; end setdbr macro .3a04b9 a2 8e 07 ldx #$078e ldx #<>err_0div .3a04bc 20 7d 01 jsr $3a017d jsr prints .3a04bf 48 pha pha ; begin setdbr macro .3a04c0 08 php php .3a04c1 e2 20 sep #$20 SEP #$20 ; set A short .as .3a04c3 a9 01 lda #$01 lda #MEM_SEGMENT .3a04c5 48 pha pha .3a04c6 ab plb plb .databank MEM_SEGMENT .3a04c7 28 plp plp .3a04c8 68 pla pla ; end setdbr macro .3a04c9 c2 30 rep #$30 REP #$30 ; set A&X long .al .xl .3a04cb a9 fe ff lda #$fffe lda #CELL_MAX-1 .3a04ce 85 60 sta $60 sta IP .3a04d0 60 rts rts .3a04d1 bd 00 00 lda $010000,x di4 lda #NOSl,b,x ; NOS to TMPb via TMP(a) .3a04d4 85 6e sta $6e sta TMP .3a04d6 bd 02 00 lda $010002,x lda #NOSh,b,x .3a04d9 85 70 sta $70 sta TMP+2 .3a04db 24 70 bit $70 bit TMP+2 .3a04dd 10 05 bpl $3a04e4 bpl di3 .3a04df e6 78 inc $78 inc TMPd .3a04e1 20 3c 05 jsr $3a053c jsr negate_tmp .3a04e4 a5 6e lda $6e di3 lda TMP ; NOS from TMP(a) to TMPb .3a04e6 85 72 sta $72 sta TMPb .3a04e8 a5 70 lda $70 lda TMP+2 .3a04ea 85 74 sta $74 sta TMPb+2 .3a04ec bd 04 00 lda $010004,x lda #TOSl,b,x ; TOS to TMP(a) .3a04ef 85 6e sta $6e sta TMP .3a04f1 bd 06 00 lda $010006,x lda #TOSh,b,x .3a04f4 85 70 sta $70 sta TMP+2 .3a04f6 24 70 bit $70 bit TMP+2 .3a04f8 10 05 bpl $3a04ff bpl di2 .3a04fa e6 78 inc $78 inc TMPd .3a04fc 20 3c 05 jsr $3a053c jsr negate_tmp .3a04ff 9e 04 00 stz $010004,x di2 stz #TOSl,b,x ; prepare result space .3a0502 9e 06 00 stz $010006,x stz #TOSh,b,x .3a0505 9e 00 00 stz $010000,x stz #NOSl,b,x .3a0508 9e 02 00 stz $010002,x stz #NOSh,b,x .3a050b a5 72 lda $72 di0 lda TMPb ; is NOS 0) ; NOS = x >> y | ~(~0U >> y); ; else ; NOS = x >> y; ; } ; inst_dr(); ; } ; 1. because effective shift for a 32bit value is... 32 ; there is no need in using high word in shift count, ; low word is sufficient for 65535 shifts ; 2. because there is no need in shifting more than 32 ; times, then value of low word is masked to six lower ; bits ; NOTE: code would be simpler if in case of separate shift ; operations (i.e. shift right/shift left) in muri ; .3a059a inst_sh .3a059a a6 66 ldx $66 ldx SP ; check if shift count is positive or negative .3a059c 3c 06 00 bit $010006,x bit #TOSh,b,x .3a059f 10 1b bpl $3a05bc bpl shr_main ; shift to right ; we shifting left, so we need to negate arg .3a05a1 20 e6 05 jsr $3a05e6 jsr negate_tos .3a05a4 bd 04 00 lda $010004,x lda #TOSl,b,x .3a05a7 29 3f 00 and #$003f and #63 ; we need only low 6 bits .3a05aa d0 03 bne $3a05af bne + ; do something if > 0 .3a05ac 4c c3 01 jmp $3a01c3 jmp inst_dr .3a05af a8 tay + tay ; shifting left is the same for neg and pos vals .3a05b0 1e 00 00 asl $010000,x shl_main asl #NOSl,b,x .3a05b3 3e 02 00 rol $010002,x rol #NOSh,b,x .3a05b6 88 dey dey .3a05b7 d0 f7 bne $3a05b0 bne shl_main .3a05b9 4c c3 01 jmp $3a01c3 jmp inst_dr ; shift right --------------------------------- .3a05bc bd 04 00 lda $010004,x shr_main lda #TOSl,b,x .3a05bf 29 3f 00 and #$003f and #63 ; we need only low 6 bits .3a05c2 d0 03 bne $3a05c7 bne + ; do something if > 0 .3a05c4 4c c3 01 jmp $3a01c3 jmp inst_dr .3a05c7 a8 tay + tay ; did we shifting negative or positive value? .3a05c8 3c 02 00 bit $010002,x bit #NOSh,b,x .3a05cb 30 0c bmi $3a05d9 bmi shr_neg .3a05cd 5e 02 00 lsr $010002,x shr_pos lsr #NOSh,b,x .3a05d0 7e 00 00 ror $010000,x ror #NOSl,b,x .3a05d3 88 dey dey .3a05d4 d0 f7 bne $3a05cd bne shr_pos .3a05d6 4c c3 01 jmp $3a01c3 jmp inst_dr .3a05d9 18 clc shr_neg clc .3a05da 7e 02 00 ror $010002,x ror #NOSh,b,x .3a05dd 7e 00 00 ror $010000,x ror #NOSl,b,x .3a05e0 88 dey dey .3a05e1 d0 f6 bne $3a05d9 bne shr_neg .3a05e3 4c c3 01 jmp $3a01c3 jmp inst_dr ; additional routines for shifting ------------ .3a05e6 ea nop negate_tos nop .3a05e7 20 f3 05 jsr $3a05f3 jsr invert_tos .3a05ea fe 04 00 inc $010004,x inc #TOSl,b,x ; STACKBASE+0,x .3a05ed d0 03 bne $3a05f2 bne + .3a05ef fe 06 00 inc $010006,x inc #TOSh,b,x ; STACKBASE+2,x .3a05f2 60 rts + rts .3a05f3 invert_tos .3a05f3 bd 04 00 lda $010004,x lda #TOSl,b,x ; STACKBASE+0,x .3a05f6 49 ff ff eor #$ffff eor #$FFFF .3a05f9 9d 04 00 sta $010004,x sta #TOSl,b,x ; STACKBASE+0,x .3a05fc bd 06 00 lda $010006,x lda #TOSh,b,x ; STACKBASE+2,x .3a05ff 49 ff ff eor #$ffff eor #$FFFF .3a0602 9d 06 00 sta $010006,x sta #TOSh,b,x ; STACKBASE+2,x .3a0605 60 rts rts ; --------------------------------------------------------- ; ## zr (25) stack: n-? | - zero return ; ; returns from a subroutine if the top item on the stack is zero. ; If not, it acts like a NOP instead. ; ; void inst_zr() { ; if (TOS == 0) { ; inst_dr(); ; ip = TORS; ; rp--; ; } ; } .3a0606 inst_zr .3a0606 a6 66 ldx $66 ldx SP .3a0608 bd 04 00 lda $010004,x lda #TOSl,b,x .3a060b d0 19 bne $3a0626 bne zr_quit .3a060d bd 06 00 lda $010006,x lda #TOSh,b,x .3a0610 d0 14 bne $3a0626 bne zr_quit .3a0612 20 c3 01 jsr $3a01c3 do_zr jsr inst_dr .3a0615 a4 68 ldy $68 ldy RP .3a0617 b9 00 04 lda $010400,y lda #TRSl,b,y .3a061a 85 60 sta $60 sta IP .3a061c 20 58 01 jsr $3a0158 jsr update_ipptr .3a061f 98 tya tya .3a0620 38 sec sec .3a0621 e9 04 00 sbc #$0004 sbc #CELL_SIZE .3a0624 85 68 sta $68 sta RP .3a0626 60 rts zr_quit rts ; --------------------------------------------------------- ; ## ha (26) stack: - | - halt .3a0627 inst_ha .3a0627 a9 fe ff lda #$fffe lda #CELL_MAX-1 ; XXX - change it .3a062a 85 60 sta $60 sta IP .3a062c 60 rts rts ; --------------------------------------------------------- ; ## ie (27) stack: -n | - i/o enumerate .3a062d inst_ie .3a062d a5 66 lda $66 lda SP .3a062f 18 clc clc .3a0630 69 04 00 adc #$0004 adc #CELL_SIZE ; 4 bytes .3a0633 85 66 sta $66 sta SP .3a0635 aa tax tax .3a0636 a9 02 00 lda #$0002 lda #NUM_DEVICES .3a0639 9d 04 00 sta $010004,x sta #TOSl,b,x .3a063c 9e 06 00 stz $010006,x stz #TOSh,b,x .3a063f 60 rts rts ; --------------------------------------------------------- ; ## iq (28) stack: n-xy | - i/o query ; ; void inst_iq() { ; CELL Device = TOS; ; inst_dr(); ; IO_queryHandlers[Device](); ; } .3a0640 inst_iq .3a0640 a6 66 ldx $66 ldx SP .3a0642 bd 04 00 lda $010004,x lda #TOSl,b,x .3a0645 48 pha pha .3a0646 20 c3 01 jsr $3a01c3 jsr inst_dr .3a0649 4c 58 06 jmp $3a0658 jmp io_query ; ## ii (29) stack: ...n- | - i/o invoke ; ; void inst_ii() { ; CELL Device = TOS; ; inst_dr(); ; IO_deviceHandlers[Device](); ; } ; ; void generic_output() { ; putc(stack_pop(), stdout); ; fflush(stdout); ;} .3a064c inst_ii .3a064c a6 66 ldx $66 ldx SP .3a064e bd 04 00 lda $010004,x lda #TOSl,b,x .3a0651 48 pha pha .3a0652 20 c3 01 jsr $3a01c3 jsr inst_dr .3a0655 4c 8b 06 jmp $3a068b jmp io_handle ; --------------------------------------------------------- ; device support ; --------------------------------------------------------- ; number of device on stack .3a0658 io_query ; numbers are counted from 0, so val should be ; lower than number of devices .3a0658 7a ply ply .3a0659 c0 02 00 cpy #$0002 cpy #NUM_DEVICES .3a065c 90 05 bcc $3a0663 bcc query .3a065e a9 fe ff lda #$fffe lda #CELL_MAX-1 .3a0661 85 60 sta $60 sta IP ;wdm #KILL ; effective error .3a0663 a5 66 lda $66 query lda SP .3a0665 18 clc clc .3a0666 69 04 00 adc #$0004 adc #4 .3a0669 85 66 sta $66 sta SP .3a066b aa tax tax .3a066c 98 tya tya .3a066d 9d 04 00 sta $010004,x sta #TOSl,b,x ; device number .3a0670 9e 06 00 stz $010006,x stz #TOSh,b,x .3a0673 d0 03 bne $3a0678 bne is_key .3a0675 4c 84 06 jmp $3a0684 is_output jmp version0 ; output ver0 .3a0678 c9 01 00 cmp #$0001 is_key cmp #1 .3a067b d0 03 bne $3a0680 bne unknown .3a067d 4c 84 06 jmp $3a0684 jmp version0 ; keyboard ver0 .3a0680 20 c3 01 jsr $3a01c3 unknown jsr inst_dr ; drop already put dev no .3a0683 60 rts rts ; never reachable .3a0684 9e 00 00 stz $010000,x version0 stz #NOSl,b,x .3a0687 9e 02 00 stz $010002,x stz #NOSh,b,x .3a068a 60 rts rts ; --------------------------------------------------------- ; number of device on stack .3a068b io_handle ; numbers are counted from 0, so val should be ; lower than number of devices .3a068b 7a ply ply .3a068c c0 02 00 cpy #$0002 cpy #NUM_DEVICES .3a068f 90 05 bcc $3a0696 bcc interact .3a0691 a9 fe ff lda #$fffe lda #CELL_MAX-1 .3a0694 85 60 sta $60 sta IP ;wdm #KILL ; stop - error .3a0696 c0 00 00 cpy #$0000 interact cpy #0 .3a0699 f0 22 beq $3a06bd beq screen ; crude, but should work ; keyboard input .3a069b a5 66 lda $66 lda SP .3a069d 18 clc clc .3a069e 69 04 00 adc #$0004 adc #4 .3a06a1 85 66 sta $66 sta SP .3a06a3 aa tax tax ;wdm #TRACE_OFF .3a06a4 22 4c 10 00 jsl $00104c jsl C256_GETCHW ; all regs preserved here ;wdm #TRACE_ON .3a06a8 c2 30 rep #$30 REP #$30 ; set A&X long .al .xl .3a06aa 29 ff 00 and #$00ff and #$00ff ; only byte lower is needed .3a06ad c9 0d 00 cmp #$000d cmp #$0d ; change 0d to 0a .3a06b0 d0 03 bne $3a06b5 bne + .3a06b2 a9 0a 00 lda #$000a lda #$0a .3a06b5 ea nop + nop .3a06b6 9d 04 00 sta $010004,x sta #TOSl,b,x .3a06b9 9e 06 00 stz $010006,x stz #TOSh,b,x .3a06bc 60 rts rts ; screen output .3a06bd a6 66 ldx $66 screen ldx SP .3a06bf 8a txa txa .3a06c0 38 sec sec .3a06c1 e9 04 00 sbc #$0004 sbc #4 .3a06c4 85 66 sta $66 sta SP ; SP is new but X point to previous element .3a06c6 bd 04 00 lda $010004,x lda #TOSl,b,x .3a06c9 29 ff 00 and #$00ff and #$00ff .3a06cc c9 0a 00 cmp #$000a cmp #$0a .3a06cf d0 03 bne $3a06d4 bne + .3a06d1 a9 0d 00 lda #$000d lda #$0d .3a06d4 ea nop + nop ;wdm #TRACE_OFF .3a06d5 22 18 10 00 jsl $001018 jsl C256_PUTC ;wdm #TRACE_ON .3a06d9 c2 30 rep #$30 REP #$30 ; set A&X long .al .xl .3a06db 60 rts rts .warn "Code size: ", repr(* - main) ; --------------------------------------------------------- ; # messages ; a counted-string experiment pstring .macro txt .endm ; zero-terminated strings >3a06dc 0d 52 45 54 52 4f 2f 38 msg_banner .text $d, "RETRO/816 - NGA/816-32 2021-02-21", $d, $0 >3a06e4 31 36 20 2d 20 4e 47 41 2f 38 31 36 2d 33 32 20 >3a06f4 32 30 32 31 2d 30 32 2d 32 31 0d 00 >3a0700 63 6c 65 61 6e 69 6e 67 msg_mclean .text "cleaning memory...", $d, $0 >3a0708 20 6d 65 6d 6f 72 79 2e 2e 2e 0d 00 >3a0714 63 6c 65 61 6e 69 6e 67 msg_sclean .text "cleaning stack...", $d, $0 >3a071c 20 73 74 61 63 6b 2e 2e 2e 0d 00 >3a0727 63 6f 70 79 69 6e 67 20 msg_copy .text "copying image...", $d, $0 >3a072f 69 6d 61 67 65 2e 2e 2e 0d 00 >3a0739 4e 47 41 20 66 69 6e 69 msg_end .text "NGA finished, press any key to restart", $d, $0 >3a0741 73 68 65 64 2c 20 70 72 65 73 73 20 61 6e 79 20 >3a0751 6b 65 79 20 74 6f 20 72 65 73 74 61 72 74 0d 00 >3a0761 45 52 52 4f 52 3a 20 73 err_uf .text "ERROR: stack underflow, re-starting system!", $d, $0 >3a0769 74 61 63 6b 20 75 6e 64 65 72 66 6c 6f 77 2c 20 >3a0779 72 65 2d 73 74 61 72 74 69 6e 67 20 73 79 73 74 >3a0789 65 6d 21 0d 00 >3a078e 45 52 52 4f 52 3a 20 64 err_0div .text "ERROR: division-by-zero, re-starting system!", $d, $0 >3a0796 69 76 69 73 69 6f 6e 2d 62 79 2d 7a 65 72 6f 2c >3a07a6 20 72 65 2d 73 74 61 72 74 69 6e 67 20 73 79 73 >3a07b6 74 65 6d 21 0d 00 >3a07bc 49 4e 46 4f 3a 20 68 61 err_halt .text "INFO: halt op called! Going to infinite loop.", $d, $0 >3a07c4 6c 74 20 6f 70 20 63 61 6c 6c 65 64 21 20 47 6f >3a07d4 69 6e 67 20 74 6f 20 69 6e 66 69 6e 69 74 65 20 >3a07e4 6c 6f 6f 70 2e 0d 00 >3a07eb 45 52 52 4f 52 3a 20 72 err_memuf .text "ERROR: read from unknown bad, negative mem addr!", $d, $0 >3a07f3 65 61 64 20 66 72 6f 6d 20 75 6e 6b 6e 6f 77 6e >3a0803 20 62 61 64 2c 20 6e 65 67 61 74 69 76 65 20 6d >3a0813 65 6d 20 61 64 64 72 21 0d 00 ; --------------------------------------------------------- ; # forth image ; image create by standard RETRO tools ; cp ngaImage barebones.image ; ./bin/retro-extend barebones.image interface/barebones.forth ; >3a081d 01 07 00 00 10 25 00 00 IMAGE_SRC .binary "barebones.image" >3a0825 5c 24 00 00 1e 25 00 00 75 15 03 00 00 00 00 00 >3a0835 0a 00 00 00 01 00 00 00 0a 00 00 00 02 00 00 00 >3a0845 0a 00 00 00 03 00 00 00 0a 00 00 00 04 00 00 00 >3a0855 0a 00 00 00 05 00 00 00 0a 00 00 00 06 00 00 00 >3a0865 0a 00 00 00 07 00 00 00 0a 00 00 00 08 00 00 00 >3a0875 0a 00 00 00 09 00 00 00 0a 00 00 00 0a 00 00 00 >3a0885 0b 00 00 00 0a 00 00 00 0c 00 00 00 0a 00 00 00 >3a0895 0d 00 00 00 0a 00 00 00 0e 00 00 00 0a 00 00 00 >3a08a5 0f 00 00 00 0a 00 00 00 10 00 00 00 0a 00 00 00 >3a08b5 11 00 00 00 0a 00 00 00 12 00 00 00 0a 00 00 00 >3a08c5 13 00 00 00 0a 00 00 00 14 00 00 00 0a 00 00 00 >3a08d5 15 00 00 00 0a 00 00 00 16 00 00 00 0a 00 00 00 >3a08e5 17 00 00 00 0a 00 00 00 18 00 00 00 0a 00 00 00 >3a08f5 19 00 00 00 0a 00 00 00 02 01 11 04 01 00 00 00 >3a0905 0f 0a 00 00 02 01 11 05 01 00 00 00 10 06 0a 00 >3a0915 8b 0c 00 00 94 0c 00 00 01 10 01 10 3f 00 00 00 >3a0925 3e 00 00 00 01 0c 01 11 00 00 00 00 3f 00 00 00 >3a0935 0f 08 00 00 0a 00 00 00 05 01 0b 06 00 00 00 00 >3a0945 09 00 00 00 0a 00 00 00 01 08 00 00 38 00 00 00 >3a0955 19 00 00 00 03 01 07 00 4c 00 00 00 02 01 08 00 >3a0965 4c 00 00 00 01 12 04 12 01 00 00 00 0a 00 00 00 >3a0975 03 03 03 01 00 00 00 00 06 06 03 03 0a 00 00 00 >3a0985 19 00 00 00 03 01 08 00 5f 00 00 00 06 06 03 03 >3a0995 0a 00 00 00 02 0f 05 01 01 00 00 00 11 04 02 0f >3a09a5 05 01 11 06 01 00 00 00 02 06 0c 01 56 00 00 00 >3a09b5 01 01 08 00 5a 00 00 00 40 00 00 00 03 03 01 0a >3a09c5 ff ff ff ff 01 0f 01 08 03 00 00 00 3b 00 00 00 >3a09d5 01 10 0a 00 03 00 00 00 0f 01 07 00 6b 00 00 00 >3a09e5 01 08 00 00 38 00 00 00 19 00 00 00 01 08 00 00 >3a09f5 6b 00 00 00 01 07 00 00 72 00 00 00 01 08 00 00 >3a0a05 72 00 00 00 03 01 01 07 00 00 00 00 6b 00 00 00 >3a0a15 00 00 00 00 01 01 08 00 19 00 00 00 70 00 00 00 >3a0a25 01 01 10 0a 00 00 00 00 7e 00 00 00 01 0f 19 00 >3a0a35 7e 00 00 00 03 01 01 08 07 00 00 00 70 00 00 00 >3a0a45 01 07 00 00 6b 00 00 00 07 00 00 00 01 01 08 00 >3a0a55 01 08 00 00 6b 00 00 00 01 07 00 00 6b 00 00 00 >3a0a65 01 0f 01 01 7e 00 00 00 8d 00 00 00 8c 00 00 00 >3a0a75 01 07 00 00 40 00 00 00 01 0f 01 01 7e 00 00 00 >3a0a85 70 00 00 00 8c 00 00 00 01 07 00 00 40 00 00 00 >3a0a95 07 00 00 00 0a 00 00 00 01 11 0a 00 01 00 00 00 >3a0aa5 01 11 0a 00 02 00 00 00 01 11 0a 00 03 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